Sheng-Hao Huang's profile picture

Sheng-Hao Huang

Hardware Engineer III at Akuna Capital

Sheng-Hao Huang is an experienced hardware engineer currently serving as Hardware Engineer III at Akuna Capital since August 2020, having previously worked as a Junior FPGA Developer. Prior experience includes a role as a Sr. Hardware Developer Intern at IBM, where contributions involved VHDL design and validation for Power10 and Power9 chips, along with Python scripting for memory controller testing. Educational qualifications include a Master of Science and a Bachelor of Science in Electrical and Computer Engineering from Carnegie Mellon University. Additionally, Sheng-Hao Huang has held positions in research and development at Sandia National Laboratories and participated in various projects and teaching assistant roles at Carnegie Mellon University, demonstrating a strong foundation in hardware design, implementation, and debugging.

Links

Previous companies

Sandia Corporation logo
Carnegie Mellon University logo
IBM logo

Org chart

This person is not in the org chart


Teams

This person is not in any teams


  1. This content will be removed shortly.