Stacey Ross is a distinguished verification engineer with extensive experience in pre-silicon functional verification and validation, currently serving at Ampere since February 2019. Previously, Stacey held the position of validation architect at Intel Corporation from June 2015 to February 2019, leading a team in the implementation of verification strategies for flagship CPU and SoC components. Prior to this, Stacey worked at Intel Corporation from 1997 to 2012 in various roles, including validation tech lead and validation engineer, specializing in testbench architecture and development. Stacey's early career includes experience as a verification engineer at AMD and an engineering intern at IBM. Stacey earned a Master of Engineering in Electrical and Electronics Engineering from the University of Louisville.
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