Nirav Patel is a skilled engineer with extensive experience in design verification and technical staff roles. Currently serving as a Member of Technical Staff at Astera Labs since November 2020, Nirav has a solid background in design verification from previous positions at Facebook and Google, working as a Design Verification Engineer from January 2020 to January 2020. Nirav's career also includes significant experience at Intel Corporation and Infinera, primarily focusing on design verification engineering, along with early experience as an ASIC Engineer at eInfochips. Educationally, Nirav holds a B.Tech in Electronics & Communications Engineering from Ganpat University, which was completed in 2009.
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