Deepak Yadav

Deepak Yadav is an experienced ASIC Design Engineer currently working at Axis Communications since June 2024. Prior to this role, Deepak served as Digital Design Lead and Senior Digital Designer at BeammWave, focusing on mmWave digital beamforming radio architecture and RTL design for ARM processor-based subsystems on Xilinx FPGA. Deepak has also held significant positions at Ericsson, including Agile Product Owner, Agile Scrum Master, and ASIC Designer, where responsibilities encompassed managing cross-functional teams, designing TST switch IP for 5G, and optimizing design specifications. Educational qualifications include a Master's of Science in Electronic Design from The Faculty of Engineering at Lund University and a Bachelor of Technology in Electronics and Communications Engineering from Lingaya's University. Additionally, Deepak has completed internships and training at esteemed organizations, contributing to various projects in signal processing and communication technologies.