Trevis Chandler

Trevis Chandler is a seasoned engineer with extensive experience in integrated circuit design and verification. Currently serving as a Member of Technical Staff at Cerebras Systems since March 2021, Trevis has previously held key engineering roles at Untether AI as a Principal Engineer, and at Intel Corporation as a Design Engineer, focusing on the custom design of programmable logic circuits. Expertise spans various companies including AMD, Tabula, and Xilinx, with significant contributions to GDDR5 digital blocks, SRAM design, and advanced simulation techniques. Trevis holds a Master of Applied Science and a Bachelor of Applied Science in Electrical Engineering from the University of Toronto.