Antonio di Santillo

Interlocking Software Engineer at Intecs

Antonio Di Santillo is an experienced Interlocking Software Engineer currently at Hitachi Rail since April 2024, with prior experience at Intecs beginning January 2019. Responsibilities include configuration and development of generic application logic for railway interlocking and requirements analysis. Previously, Antonio served as a RAMS and V&V Engineer, focusing on verification and validation activities related to ATP subsystems and RBC configurations. Prior roles include a part-time animator at AMMUINA ANIMATION, which enhanced interpersonal and leadership skills, as well as administrative experience at Università degli Studi della Campania Luigi Vanvitelli. Antonio holds a Bachelor's degree in Electronic and Computer Engineering from the University of Campania "Luigi Vanvitelli" and has a diploma from Liceo Scientifico Statale Emilio Segre.

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