Joveria Asif

Joveria Asif is an experienced Automated Market Making Strategist and FPGA Design Engineer currently working at Morgan Stanley since January 2017, where responsibilities include architecting, designing, verifying, validating, deploying, analyzing, and supporting ultra-low latency FPGA trading systems. Prior experience includes a role as a Senior Analyst in Technology for Fixed Income, Currencies, and Commodities at Goldman Sachs, where software solutions were developed and automated trading systems for Foreign Exchange and Credit Derivatives were built using proprietary programming languages. Earlier in the career, Joveria held positions at AMD from 1999 to 2011, serving as both a Technical Team Leader for ASIC Design Verification and a Hardware Behavioural Modelling Engineer, contributing to the design and verification of complex ASIC logic blocks and creating behavioral models using various programming languages. Joveria Asif holds a BASc in Computer Engineering from the University of Toronto.