Joe Slaton

Joe Slaton is a seasoned engineering professional with extensive experience in RFIC design and product characterization. Currently serving as Staff Engineer and RFIC Design Manager at pSemi, A Murata Company since September 2017, Joe leads design efforts for high-power antenna tuning products and holds multiple IC design patents. Previous roles include Staff RFIC Design Engineer and Senior RF Characterization Engineer at Peregrine Semiconductor, where Joe was pivotal in developing methodologies for pre-silicon verification and product characterization. Joe began their career in data analysis at VRC-30 and served as a Petty Officer First Class in the US Navy. Joe holds a Master’s degree in Electrical and Electronics Engineering from Arizona State University, a Bachelor’s degree from UC San Diego, and an Associate degree in Physics from San Diego Mesa College.