George Lin

ASIC Digital Design Intern at Synopsys

George Lin is currently an ASIC Digital Design Intern at Synopsys Inc, where contributions include enhancing execution speed of ASIC IP packaging scripts, developing a high-accuracy neural network-based DSP scheme in TensorFlow, and implementing calibration sequences in a UVM environment for digital PLLs. Previous experience includes leading the Aircraft Team at UBC Uncrewed Aircraft Systems, achieving notable placements in national and international competitions, and serving as a Technical Support Specialist at Home's Way. George Lin is pursuing a Bachelor of Applied Science at The University of British Columbia, expected to graduate in 2027.

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