Andrew Gruskay is a highly experienced Senior Principal Hardware Engineer at ZeeVee, with a robust background in FPGA hardware engineering spanning over two decades. Prior to joining ZeeVee in October 2022, Andrew held various positions, including FPGA Hardware Engineer at Casa Systems and Principal FPGA Designer at Goodrich, where significant contributions were made to major FPGA designs and image processing boards. Throughout Andrew's career, expertise has been demonstrated in leading complex engineering projects, including architecture, design, validation, and integration of telecom product cards at Alcatel. Andrew holds a Bachelor of Science in Electrical and Computer Engineering from Worcester Polytechnic Institute and has undertaken additional leadership training at Mountain Leadership School.
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