Cheong Tse

Cheong Tse has over 25 years of experience in the field of FPGA applications and engineering. Cheong currently holds the position of Sr. Principal Engineer/FPGA Applications Manager at Achronix Semiconductor Corporation since May 2021. Prior to this, they worked at Intel Corporation from 2016 to 2021, where they held two roles.

At Intel, as an FPGA Datacenter Apps Engineer, Cheong collaborated with top-tier customers to develop FPGA acceleration cards. Cheong also created proof-of-concept designs and performed debugging of PCIe, DDR4, and HBM2 interfaces. In their role as FPGA Software Apps Engineer, they led the debugging efforts for hardware failures and coordinated cross-functional teams to provide final solutions.

Before Intel, Cheong worked at Synopsys Inc, where they held the role of Staff Corporate Apps Engineer (FPGA) from 2007 to 2016. In this position, they managed various FPGA synthesis projects, owned overall verifications, and coordinated different teams.

Prior to Synopsys Inc, Cheong worked at Lattice Semiconductor as a Sr. Software Engineer (FPGA Synthesis) from 2004 to 2007. Cheong drove and managed synthesis partners to improve quality of results (QoR) and analyzed benchmark designs to explore more efficient ways of synthesis mapping.

Cheong's career in the field of FPGA started at Teradyne, where they worked as a Hardware Design Engineer from 1995 to 2003. In this role, they were involved in the entire FPGA design process, including specification, RTL, synthesis, place/route, timing closure, simulation, and PCB design.

Throughout their career, Cheong has gained extensive experience in FPGA applications, synthesis, debugging, and hardware design.

Cheong Tse has a Bachelor of Science degree in EECS (Electrical Engineering and Computer Science) from the University of California, Berkeley. The exact duration of their education or the year they completed their degree is not mentioned.