George Tien

George Tien has extensive work experience in the semiconductor industry, with their most recent role being an ASIC/Physical Design/Circuit Design engineer at Achronix Semiconductor Corporation since March 2020. Prior to that, they worked as a Senior ASIC Design Engineer at NVIDIA for seven years from July 2013 to March 2020. Before joining NVIDIA, George was a Principal Circuit Design Engineer at SuVolta from September 2011 to April 2013. George also worked as a Staff Design Engineer at Soft Machines from September 2010 to September 2011 and as a Staff Design Engineer at ARM from May 2009 to September 2010. George had earlier roles as a Sr. SRAM Design Manager at Transmeta Corporation from September 2005 to January 2009, a Senior Staff Circuit Design Engineer at Cypress Semiconductor from July 2004 to August 2005, and a Senior Circuit Design Engineer, MTS, at Sun Microsystems, Inc. from February 2002 to June 2004. Additionally, George worked as a Senior Circuit Design Engineer at SandCraft, Inc. from 2001 to 2002 and as a Design Engineer at MIPS Technologies, Inc. from May 1999 to May 2001.

George Tien has an educational background in Electrical Engineering and Computer Science (EECS). From 1988 to 1990, they attended The University of Texas at Austin and studied Electrical Engineering, but it is unclear whether they completed a degree during this time.

Then, from 1990 to 1993, George Tien attended the University of California, Berkeley and obtained a Bachelor of Science degree in EECS. Following this, from 1995 to 1996, they pursued a Master of Science degree in EECS at the University of Michigan.

In terms of additional certifications, George Tien obtained a certification in Learning FPGA Development from LinkedIn in June 2019.