Laurent Thévenoux

Laurent Thévenoux's work experience includes being a Compiler Engineer at AdaCore since September 2021 and at Kalray from January 2018 to September 2021. Laurent also worked as a Postdoctoral Research Engineer at Inria from April 2015 to December 2017, where they worked on algorithms using real, safe, precise, and efficient arithmetic, specifically in the areas of compilation and architecture. Additionally, Laurent has experience as a Teaching Assistant at Université Claude Bernard Lyon 1 from September 2015 to August 2016 and as a Software Engineer at Numalis from September 2014 to March 2015. Laurent served as an ATER (Temporary Teaching and Research Assistant) and a Doctoral Candidate at Université de Perpignan, UPVD, France, from September 2013 to August 2014 and from September 2010 to July 2014, respectively. In their doctoral research, they focused on code synthesis with trade-offs between performance and precision in IEEE 754 floating-point arithmetic, including techniques for improving numerical precision and finding performance-precision compromises. Laurent also worked as a Teaching Assistant at Université de Perpignan, UPVD, France, from September 2010 to August 2013.

Laurent Thévenoux has a strong background in computer science and information technology. Laurent began their education in 2005 at Lycée Pablo Picasso (formerly known as Clos Banet) where they obtained a BTS degree in Information Technology and Networks for Industry and Technical Services in 2007. Laurent then continued their studies at UPVD Alumni, earning a Licence in Computer Science in 2008. Laurent further pursued their education at UPVD Alumni, graduating with a Master's degree in Electronics, Automatics, and Computer Science (EAI) in 2010. Laurent capped off their education with a Doctorate degree in Computer Science from UPVD Alumni in 2014, specializing in the field of Informatics.