Scott Hughes

Scott Hughes has a diverse work experience spanning over two decades. Scott worked as a Principal Engineer R&D FPGA at ADVA, where they contributed to the development of high-speed network aggregation equipment. Scott has expertise in SystemVerilog RTL, high-speed transceiver configuration and debug, and handling data rates up to 25Gbps. Prior to ADVA, Scott worked at Maxim Integrated Products as a Senior Design Engineer, specializing in low-power and small gate count IC designs. Scott performed various tasks such as RTL writing, synthesis, static timing analysis, and formal verification. Scott also has experience as a Software Engineer at Objectware and Telinet. Scott started their career as a Teaching Assistant at Georgia Institute of Technology, honing their skills in Object-Oriented design methodology, computer pipeline architectures, digital design, and FPGA design.

Scott Hughes attended the Georgia Institute of Technology from 1995 to 2000, where they earned a Bachelor's degree in Computer Engineering.