Baber Ali

Baber Ali is an experienced engineer specializing in design verification and SoC verification, currently serving as a Senior Design Verification Engineer at AMD since October 2024. Prior to this, Baber held the position of SoC Verification Engineer at RapidSilicon, focusing on block level and chip level verification of interfaces, including I2C and Config/Pre-load Interface. Baber also worked as an Associate Design Engineer at Lampró Méllon, where activities included IP verification using UVM, and was a Trainee in RTL Design, gaining experience with Verilog, RISC-V ISA, and System Verilog. An internship at the Pakistan Council of Scientific and Industrial Research provided hands-on experience with laboratory equipment and integrated circuits. Baber Ali holds a Bachelor of Science in Electrical Engineering from Information Technology University, completed in 2019.