Kostas Siomalas is an accomplished engineering professional with extensive experience in design verification and ASIC verification, currently serving as a Senior Design Verification Engineer at AMD since March 2024. Previously held senior roles at Cerio, Alphawave IP Group, Keysight Technologies, and Ciena, demonstrating a strong background in design and verification processes. Earlier career experiences include positions as a DSP Designer at Huawei Technologies and an R&D Engineer at Ericsson, along with a tenure as a Flight Instructor at Ottawa Flying Club. Kostas has a rich history at Nortel Networks, contributing as a Member of Scientific Staff in ASIC and FPGA design and verification. Educational credentials include a PhD and a Master’s degree in Electrical, Electronics and Communications Engineering from Carleton University, along with a Professional Engineer Diploma from the University of Patras.
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