Sebastian Araneda

Sebastian Araneda has over four years of professional experience in the engineering field. In 2021, they are currently working as a Hardware Lead, Senior Hardware Engineer, R&D Engineer, and Support Engineer at Algramo. Prior to this, they were a Full Stack Developer at TECNOCAL in 2020 and a Technology Consultant and Advisory Trainee at EY in 2020. In 2019, they worked as an Electrical Supervisor and circuit design in architectural installation at Estudio de arquitectura NORMA, where they designed the circuitry for a large art installation intended to be presented on the (relocated) COP25 summit in Chile. From 2017 to 2019, they were a Field-Programmable Gate Arrays Engineer at Universidad de los Andes (CL).

Sebastian Araneda graduated from Universidad de los Andes (CL) in 2020 with a Bachelor's degree in Electrical and Electronics Engineering. In 2021, they obtained an International Course on Solar Photovoltaic Energy certification from AC3E de la USM in July. In 2022, they obtained a KiCad V6 and STM32 Hardware Design certification from Udemy in January.