Kedar Karandikar

Kedar Karandikar is a Senior Distinguished Engineer at Ampere, where responsibilities include leading the Pre-Silicon Emulation and Post-Silicon System Level Validation teams and overseeing CPU validation planning and execution since October 2018. Prior to this, Kedar held various engineering roles at Intel Corporation from February 2009 to October 2018, including Senior SOC Emulation Technical Lead, with a focus on design verification using emulation and the development of associated tools. Kedar holds a Master of Science in Electrical and Computer Engineering with a specialization in Computer Architecture from Georgia Institute of Technology and a Bachelor of Engineering in Electronics and Telecommunication from K.J. Somaiya College of Engineering, University of Mumbai.