Stefano Lorenzini

Stefano Lorenzini has extensive work experience in the field of functional safety. Stefano currently works at Arteris IP as a Functional Safety Manager. Prior to this, they worked at Cadence Design Systems as a Functional Safety Solution Architect, where they played a key role in defining safety design flows and tools for customers. Stefano also promoted functional safety solutions and led engagements with major customers. Before Cadence, Stefano worked at Intel Corporation as a Functional Safety Solution Manager, where they managed the development flow and architecture of functional safety IP products. Stefano also worked at YOGITECH S.p.A. as a Functional Safety Design Engineering Manager, where they contributed to the development of faultRobust technology and set up a functional safety design flow. Stefano's previous experience includes roles at STMicroelectronics, Alcatel Microelectronics, and Ericsson Inc, where they served as a SoC Team Leader, Project Leader, and Senior Digital Designer, respectively.

Stefano Lorenzini obtained a Master's degree in Electrical and Electronics Engineering from Università di Pisa between 1985 and 1992.