Neelima Regatte is a highly experienced engineer currently serving as a Staff Engineer at Qualcomm Atheros since June 2011. Prior to this role, Neelima worked as a Design Verification Engineer II at AppliedMicro from July 2006 to January 2010 and as an ASIC Verification Engineer at Intel Corporation from May 2005 to June 2006, focusing on the verification of PCIE gen1/gen2 Physical Layer and design debugging of PCIE gen1/gen2 Data Link Layer. Neelima holds a Master’s degree in Computer Engineering from San Jose State University, completed between 2002 and 2004, and a Bachelor’s degree in Computer Science & Engineering from SRTIST, Hyderabad, India, completed from 1996 to 2000.
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