JP

Joji Philip

VP HW Engineering at Baya Systems

Joji Philip has extensive work experience in engineering roles within the technology industry. Joji is currently serving as the VP of HW Engineering at Baya Systems. Prior to this, they worked at Intel Corporation as a Principal Engineer, where they led the technical development of PCIe Gen6.0 IO processor for Intel Server products. Joji was also a Principal Engineer at NetSpeed Systems, where they played a key role in architecture, microarchitecture, and design of various fabric IPs and cache coherency controllers. Joji has previously held positions at Huawei, Qualcomm, Conexant Systems Inc., and Paxonet communications, where they contributed to the development and design of various engineering projects.

Joji Philip completed their Bachelor's degree in Electronics at Pune University from 1995 to 1999. Joji then pursued a Master's degree in Computer Engineering at the New Jersey Institute of Technology from 2007 to 2008.

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