Sandeep Athanimath is a highly experienced engineering professional currently serving as a Principal Design Engineer at Cadence Design Systems since January 2024. Prior to this role, Sandeep held various engineering positions at Microchip Technology Inc. from June 2017 to January 2024, including Principal Engineer and Senior Engineer roles. Sandeep's experience also includes contractor roles at Intel Corporation and AMD, alongside a Senior Engineer position at SmartPlay Technologies. Additionally, Sandeep worked as a Layout Design Engineer at Sankalp Semiconductors Pvt Ltd, where skills in developing IO libraries such as LVCMOS and DDR2 were demonstrated. Sandeep holds a Master of Technology in VLSI Design and Embedded Systems and a Bachelor of Engineering in Electronics and Communication, both from KLE Society's College of Engineering and Technology in Belgaum.
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