Thanh N.

Thanh N. is a highly experienced engineering professional with a strong background in application and design engineering. Currently serving as a Senior Application Engineer at Cadence Design Systems since December 2019, Thanh previously held the position of Senior Staff Engineer at Marvell Semiconductor since August 2007, where significant contributions included HDD controller designs and integration of various IPs. Prior experience encompasses roles as a Senior Engineer at Astute Networks and IBM, as well as a Senior Field Design Engineer at LSI, and an ASIC Design Engineer at Teledyne Systems Co. Educational credentials include a Bachelor of Science in Electrical and Electronics Engineering from California State University, Northridge, and an Associate of Arts in Mathematics and Computer Science from Los Angeles Valley College.