Dustin Nguyen

Principal Verification Engineer at Cavium Inc

Dustin Nguyen is a seasoned engineering professional with extensive experience in the development and verification of semiconductor technologies. Currently serving as a Principal Verification Engineer at Cavium Inc since 2010, Nguyen has contributed to the creation of SoC processors for intelligent networks. Prior to this role, significant contributions were made at Cisco Systems as a Design Verification Lead, focusing on SoC chips for large service providers and data centers. Nguyen began the career at Hewlett Packard as a Design Verification Engineer, developing memory controller chipsets, and previously worked at Intel Corporation as a Software Engineer on advanced C++ tools. Educational credentials include a B.S. in Computer Engineering with honors from the University of California, Berkeley and an M.S. in Engineering with honors from Santa Clara University.

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