Jakub Cabal

Jakub Cabal is a skilled professional in digital design and FPGA technology, currently serving as the team leader at CESNET, z.s.p.o since June 2014. Cabal leads a research and development team focused on high-speed (100+ Gbps) Ethernet packet processing. Previous roles include Digital Design Engineer, where responsibilities involved high-speed packet processing and CRC computation, and Junior Digital Design Engineer, with a focus on FPGA module implementation and verification. Prior to CESNET, Cabal worked as an External Editor for Cnews.cz, reviewing Android applications and writing articles regarding smartphones. Educational qualifications include a Master's degree in Microelectronics and a Bachelor's degree in Microelectronics and Technology from Brno University of Technology.