Eduardo Lopez Gil is currently working as a FPGA Hardware Engineer at Citadel Securities. Prior to this role, Eduardo held positions as a Principal Embedded Engineer at Emerson Process Management, a Senior Design Engineer at PS Engineering, Inc., and VP of Engineering at Algerado Corporation. Eduardo also worked as the VP of Research and Development at Dorna USA and as a R&D Engineer at Page Iberica. Eduardo's extensive experience includes designing hardware and firmware for various industries such as aerospace, aeronautics, and telecommunications. Eduardo holds a Master's degree in Engineering Management from Northwestern University and a MS/BS in Telecommunication Engineering from Universidad Politécnica de Madrid.
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