Graeme Robertson

Graeme Robertson is an experienced engineer specializing in ASIC design and product development, currently serving as the SOC Physical Design Technical Lead Manager at Cruise since January 2021. Prior to this role, Graeme held a position as Principal Engineer at SiFive, contributing to notable projects such as the FU740 multicore SoC and E24 microcontroller. Graeme's extensive experience also includes serving as Senior Director of Engineering at Neurision Pty Ltd, where key projects encompassed advanced AI SoCs and mixed-signal ASICs. Previous positions include contract roles focused on satellite-based IoT technology and wireless research, as well as significant engineering roles at Intel Shannon Ltd and Freescale Semiconductor. Graeme's academic background includes a Master’s in Science and Technology Commercialisation from the University of Adelaide and a Master’s in Microelectronic Engineering from La Trobe University, complemented by a Bachelor’s with Honours in Engineering (Electronic Systems) from La Trobe University.