Robin Kearey

Robin Kearey is a seasoned professional in the field of electronics and semiconductor design, currently serving as a Patent Examiner in Semiconductors at the European Patent Office since October 2023. Prior experience includes roles as an Analog Design Engineer at Innatera Nanosystems, where responsibilities encompassed designing analog neuromorphic circuits and supporting junior engineers, and as an Electronics Engineer at Nearfield Instruments B.V., focusing on high-speed AFM equipment. Previous positions also include Field Technical Support Engineer at TSMC, Senior Analog Design Engineer at Systematic Design, RF IC Verification Engineer at NXP Semiconductors, and roles at Texas Instruments and SystematIC Design B.V., all emphasizing analog and RF integrated circuit design. Robin holds a Master’s degree in Microelectronics and a Bachelor’s degree in Electrical Engineering from Delft University of Technology.