Jaemin Park

Jaemin Park is a seasoned Electronic Engineer with over 30 years of experience in hardware, ASIC, FPGA, DSP, and firmware design and implementation. Currently serving as a Senior FPGA/ASIC/DSP designer and Tech Leader at Fidus Systems Inc since April 2002, Jaemin has previously held positions at Tality and Cadence as an ASIC/FPGA designer, as well as a Senior H/W engineer at Samsung Electronics for a decade, gaining extensive knowledge in telecommunications. Jaemin holds a Master's degree in Computer Science from the Korea Advanced Institute of Science and Technology and a Bachelor's degree in Computer Engineering from Seoul National University. Jaemin's professional motto focuses on automation in engineering processes.