Sizhou Wang

Sizhou Wang is a Senior Digital Design Engineer at INNOPHASE since July 2014, specializing in complex mixed-signal ASIC and FPGA wireless designs, with a focus on low power trans-receiver baseband digital implementations. Previously, Sizhou worked as a Software Engineer at the Illinois Institute of Technology from January 2013 to May 2014, collaborating with Dr. Flueck on smart grid dynamic power algorithms. During a tenure at Motorola from January 2011 to January 2012, Sizhou served as a Software Engineer in Test, responsible for maintaining and updating firmware/software test scripts for mobile devices. Sizhou holds a Master's Degree in Electrical Engineering and Computer Engineering from the Illinois Institute of Technology and a Bachelor's Degree in Electrical and Electronics Engineering with a minor in English Literature from Shanghai Normal University.