Negin Sahraii

Negin Sahraii is an experienced FPGA Design and Verification Engineer currently employed at Mannarino Systems and Software Inc. since May 2018, with previous roles at Haivision and SILKAN GROUP. Negin's expertise includes RTL design using VHDL/Verilog, the development of verification environments with System Verilog, and compliance with DO-254 standards for aerospace applications. Early career highlights include work as an FPGA Designer at Parallel Geometry Inc. and a Research Associate at Polytechnique Montréal, where Negin focused on dynamic scheduling algorithms for multiprocessor platforms. Education includes a Master of Applied Science in Microelectronics from Polytechnique Montréal and a Bachelor of Science in Electrical Engineering-Telecommunication from the University of Tehran.