Arshak Arshakyan

Arshak Arshakyan is a highly experienced engineering professional with a robust background in design and verification across several companies in the semiconductor industry. Currently serving as a Senior Staff Engineer at Marvell Technology since October 2022, Arshakyan previously held key roles at Synopsys Inc. as an ASIC Digital Design Engineer and at Rianta Solutions Inc. as a Design and Verification Engineer. A significant part of Arshakyan's career was spent at Virage Logic, progressing from Engineer to Manager of RTL design, focusing on Memory BIST/BIRA architecture and RTL compilers. Additional experience includes roles at TSMC Design Technology Canada, Sidense, Epygi Technologies, and the Scientific Research Institute of Computers Engineering. Arshakyan earned a Master's degree in Physics from Yerevan State University from 1990 to 1995.