Syed Sohel Hussain

Syed Sohel Hussain is a Principal Engineer at Marvell Semiconductor since 2016, specializing in the development and debugging of testbench code for various products, including high-speed SERDES and memory blocks, and delivering ATE patterns. Prior experience includes a Senior Pre-Silicon Verification Engineer role at Intel Corp. from 2010 to 2016, focusing on power management features for the Client Platform Controller Hub, and a decade spent as a Senior Component Design Engineer at Intel Corp. from 1999 to 2009, where responsibilities included micro-architecture and debugging for various components. Early in their career, Syed held positions as a Member Technical Staff at Siemens-Pyramid, contributing to the development of a Serial PCI Interface chip, and as an Intern Hardware Design Engineer at NEC America Inc., where validation of the EDS3 chip was a key focus. Syed holds a Master’s Degree in Electrical and Computer Engineering from Portland State University and a Bachelor’s Degree in Electronics and Communication Engineering from Osmania University.