Jinesh Parikh

Jinesh Parikh is a seasoned engineering professional with extensive experience in ASIC design and system architecture. Currently serving as a Principal Engineer at Micron Technology since August 2022, Jinesh previously held the position of IP Logic Design Engineer at Intel Corporation from March 2018 to July 2022, focusing on 5G/4G Networking SOC. Prior to that, Jinesh contributed as a Principal ASIC Design Engineer at SandForce, where responsibilities included the micro-architecture and implementation of SSD controller chips. Jinesh also worked at Platys Communications, Inc. as a Sr. ASIC Design Engineer and at Enthink as a Sr. Engineer in VLSI/System Design, where notable achievements included leading the implementation of multiplexing cores. Jinesh holds a B.Tech in Instrumentation Engineering from the Indian Institute of Technology, Kharagpur.