Jo Luo

Ph.D, joined Nantero in 2015, directs NRAM array development, research, and engineering for Nantero’s NRAM® product. She is the lead inventor of developing NRAM’s multiple purpose array structures, memory fast access for sense, and splits NRAM into 3 product lines known as NRAM for DRAM, NRAM for OTP, and NRAM for NVM.

She also directs new research of CNT FET commercialization, implementing CNT FET as BEOL devices on standard CMOS process for high bandwidth, low noise, and high linearity analog/mix-signal circuities.