Shahar Avishay is a Logic Design Engineer with experience at NextSilicon since July 2022 and previously at Intel Corporation from August 2017 to July 2022, where roles included Logic Design Engineer, Performance & QoS Modeling Engineer, and Performance & QoS Modeling Intern. Shahar holds a B.Sc. in Computer and Software Engineering from the Technion - Israel Institute of Technology, completed in 2020, and a B.A. in Philosophy with a division in Mathematics from The Open University of Israel, completed in 2016.
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