Rajanish Telang

Rajanish Telang is a seasoned engineering professional with extensive experience in VLSI design and development. Currently serving as a Senior Staff Engineer at Orca Radio Systems since December 2006, Rajanish has led the architecture and implementation of Bluetooth modem technology, focusing on low power design and prototype testing, while also developing methodologies for Lint, Synthesis, STA, and GLS. Prior to this role, Rajanish excelled as a Senior Design Engineer at Metta Semiconductors Pvt. Ltd., where methodologies for formal verification and design libraries of RTL blocks were created. Additionally, experience as a Design Engineer at Insilica involved designing blocks for Wireless LAN 802.11a/b/c, and responsibilities as a Member Technical Staff at QualCore Logic Ltd. included executing multiple projects from specification to GDSII delivery, demonstrating a trajectory of growth from a Fresher to Project Lead.