Bachir Fradj is an experienced engineer specializing in FPGA and ASIC design, currently serving as an FPGA Engineer at Orthogone Technologies Inc. since April 2023. Previously, Bachir worked as an RTL Design Engineer at SiPearl, focusing on high-performance, low-power microprocessor development for European supercomputers, and contributed to the MEEP project as an Exascale Supercomputers ASIC Engineer at the Barcelona Supercomputing Center. Early career roles included ASIC/FPGA Designer at Matrox, FPGA Developer Intern at Kaloom, and various internships in software development and maintenance. Bachir holds a Master's degree in Electrical Engineering from Polytechnique Montréal, complementing an engineering degree in embedded systems from ECE.
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