Victor Chan Cheng

Signal Integrity Engineer at R&D Altanova

Victor Chan Cheng has a diverse work experience in various engineering roles. Victor started their career at Intel Corporation in 2011 as a Component Design Engineer, where they were responsible for hardware testing and test content development. Victor also worked on feature-based test plan design and functional coverage analysis. In 2017, they joined OTSI as a Senior Embedded Engineer, focusing on driver development and serving as a team lead. Victor then moved on to Intel Corporation again in 2018, this time as a Software Development Engineer, where they developed hardware models and performed quality assurance duties. Victor later joined Teradyne in 2019 as a Q&A Software Engineer, specializing in software testing and test plan design. Currently, Victor is working at R&D Altanova as a Signal Integrity Engineer, where they focus on 3D modeling, simulation, and optimization of high-speed input/output signals. Victor also manages projects related to test interface solutions on IC testing.

Victor Chan Cheng pursued their education at Tecnológico de Costa Rica, where they obtained their Bachelor's degree in Electronic Engineering from 2002 to 2009. Later, from 2013 to 2015, they furthered their studies at the same institution and completed a Master's degree in Project Management.

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