Jeff Fox has extensive experience in engineering and education, currently serving as a semi-retired volunteer Kit Engineer and Learning Engineer at RAFT - Resource Area For Teaching since September 2017, where responsibilities include designing STEM learning kits and collaborating with educators. Additionally, Jeff Fox tutors at StepUp Tutoring and mentors recent engineering graduates from San Jose State University through Braven. Previous roles include Principal Verification Architect at Altera from 2008 to 2017, where verification methodology for IP development was defined and deployed, and Principal Engineer at Intel Corporation from 1998 to 2017, contributing to IP usability and infrastructure. Early career positions encompassed leadership roles at Viewlogic, Racal Redac, Silc Technologies, and GTE Labs, with a solid educational background including a BE and MSEE in Electronics Engineering from Stony Brook University and further studies at the Massachusetts Institute of Technology.
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