Jernej Zaplotnik

Jernej Zaplotnik is an experienced electronic engineer and PCB design engineer currently employed at RLS Merilna tehnika d. o. o. since August 2017. Prior to this role, Jernej worked as a hardware engineer at Iskraemeco from March 2015 to July 2017. Jernej holds a Master’s Degree in Electrical and Electronics Engineering (2013-2016) and a Bachelor’s Degree in the same field (2010-2013) from the University of Ljubljana, Faculty of Electronics Engineering.