Mamata P

Mamata P is an experienced Lead Engineer at Sankalp Semiconductor since October 2021 and has also served as an Analog Layout Engineer at Renesas Electronics since February 2021. Prior experience includes a role as an Analog Layout Engineer at Tessolve Semiconductor Pvt. Ltd. from August 2018 to January 2022, and contracting as an Analog Layout Engineer at NXP Semiconductors from August 2018 to August 2020. Mamata holds an M.Tech in VLSI Design and Embedded Systems from RV College of Engineering, completed in 2018, and a BE in Electrical, Electronics, and Communications Engineering from SDMIT Ujire, obtained in 2016. Education also includes a PUC from JMJ Commerce College Chippagi Sirsi in 2012.