Avi Dubey

Avi Dubey is an experienced professional in the field of electronics and communication engineering, having completed a B.Tech degree from Punjab Engineering College in 2018. At UST from January 2022 to July 2024, Avi served as an Associate Engineer, focusing on HSSI subsystem verification for client Intel PSG/Altera, where responsibilities included executing and debugging various Ethernet test cases. Avi previously worked as a Hardware Design Consultant at Xesbi, designing a voice-controlled IoT module, and held the position of Trainee Engineer at Sirena Technologies, working on electronic circuits and embedded systems projects. Additionally, Avi gained experience as an Engineering Trainee at Cadence Design Systems, contributing to formal automation and verification software development.