Shivansh Bhardwaj

Design Verification Engineer at SeviTech Systems Pvt. Ltd.

Shivansh Bhardwaj is a Design Verification Engineer at UST, with experience that includes a prior role as a Student Trainee at Maven Silicon and an internship at UST focused on design verification. Additionally, Shivansh completed an internship at Solarflare Communications, also in design verification. Shivansh holds a Bachelor of Technology in Electronics and Telecommunications from Savitribai Phule Pune University and completed a training program in Design and Verification at Maven Silicon.

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