Will Chen

Will Chen is a highly experienced engineering professional specializing in circuit design and RFIC development, with over two decades of experience in the semiconductor industry. Currently serving as Senior Manager of Circuit Design Engineering at SiTime since June 2011, Will has a strong focus on low power, low noise MEMS oscillator design, as well as ultra-low power bandgap and bias circuitry, and voltage regulators in CMOS. Prior experience includes roles such as Sr RFIC Engineer at SiPort, where Will designed a low power LNA for broadcast receivers and integrated receiver systems, and numerous positions at companies like Sigma Design, Entropic Communications, and Chrontel. Will holds a Master of Science in Electrical Engineering from Oregon State University, as well as advanced degrees from Tsinghua University and Xi'an Jiaotong University.