Gianluca Blasi

Gianluca Blasi has been with STMicroelectronics since July 1997, serving as an ASIC Design Manager, where responsibilities include managing the Digital Subsystems Feasibility and Implementation team and overseeing the implementation of critical subsystems. Previously, as a Memory Design Sr Team Leader, Gianluca focused on developing performance-enhancing solutions for embedded microcores in consumer and networking applications. Additionally, in the role of Software Design Technical Manager, Gianluca managed CAD tool development for design automation and led a remote team of software engineers. Gianluca's career began as an Analog Design Engineer intern at CERN, where design work involved low power and low noise applications. Gianluca holds a Laurea in Microelectronics from Politecnico di Bari, completed in 1997, and attended Liceo Scientifico from 1987 to 1991.