Noorul Islam

Noorul Islam is a skilled Senior R&D Engineer at Synopsys Inc since October 2024, with prior experience as a Design Engineer at Samsung Semiconductor from December 2023 to October 2024, focusing on SRAM/Register File circuit design and validation, including timings and marginality analysis. Noorul's expertise encompasses critical aspects of semiconductor design, including functional verifications and power characterization, gained through previous roles at Zia Semiconductor Pvt Ltd, where responsibilities included SRAM compiler architecture design and bitcell characterization. Noorul commenced a research internship at the National Institute of Technology Hamirpur in June 2019 and holds a B.Tech in Electrical and Electronics Engineering and a diploma in Instrumentation and Control Engineering from Aligarh Muslim University.