Sushovan Mitra is a seasoned engineer with extensive experience in the field of Verification Products. Currently serving as a Principal Engineer at Synopsys Inc since January 2004, Sushovan has contributed to various domains including static checks, formal verification, FPGA-based synthesis and emulation, and netlist optimization. Prior to this role, Sushovan worked as a Senior Software Engineer at Atrenta from June 2001 to January 2004, focusing on static checks and formal verification techniques. Sushovan holds a Bachelor of Engineering degree in Computer Science and Engineering from Jadavpur University, obtained in 2001, and completed higher secondary education at Ramkrishna Mission Vidyamandir, Belur Math.
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