Alessandro Dezzani

Alessandro Dezzani, a Senior Analog Design Engineer at Teledyne e2v, has a wealth of experience in designing high-speed ADCs and DACs. Prior to their current role, Alessandro worked at ASYGN and Wipro Limited as a Senior Analog-RF Engineer, where Alessandro designed various circuits for a range of products. With a background in electronics and telecom, Alessandro's expertise has been honed through their tenure at companies like ST Microelectronics, showcasing their skills in designing ultra-low-power and wide-band Sigma-Delta ADCs and SDR receivers.