Jerome Pratlong

Jerome PRATLONG has worked as a CMOS Chief Engineer and team leader at Teledyne e2v since July 2006. Prior to that, they were an Analogue Designer of EEPROM memory in the SmartCard division at Atmel Corporation from 2002 to 2006. From 2000 to 2002, they worked as an Analogue Designer at Conexant systems, specializing in high-speed CDR, SERDES, and transceiver technologies. Before that, they were a CMOS Memory Designer in the ASIC division at Atmel Corporation from 1997 to 2000.

Jerome PRATLONG studied at Polytech Montpellier and graduated in 1997 with a degree in Microélectronique et automatique.